Symmetric multiprocessing (SMP) involves a multiprocessor (or multi-core) computer architecture where multiple homogeneous processors (or cores) are connected to a centralized shared main memory. The processors have equal access to system resources and are controlled by a single operating system instance. They are treated equally in that none are reserved for special purposes. Apart from sharing resources, they are capable of operating independently and often have a dedicated cache memory to enhance performance. SMP systems allow any processor to work on any task, with the limitation that each task in the system is executing on no more than one processor at a time. With proper operating system support, SMP systems can easily move tasks between processors to efficiently balance system workload.
With frequency scale-up having reached its practical limit to drive increased computer processing speeds, computer systems are now growing instead in number of cores per chip and number of chips per system. Most of these systems are full symmetric multiprocessing (SMP) systems, which require relatively complex sub-systems for cache coherency maintenance and bus arbitration. At the same time, memory sub-systems are increasing the number of cache levels supported before write operations reach physical memory. All of these caches and memory must be kept coherent, thus adding an additional layer of complexity to an already complex system.
Large SMP systems and deeper cache hierarchies increase the possibility of certain write operations failing to occur when they should because of issues in coherency protocols, bus arbitration, or control logic. This is particularly true for applications which are memory intensive, because these applications stress the memory sub-system much more than others. Even missing a write of a single byte can cause an application to crash, and if the missing write operation is for privileged software, like a hypervisor working with logical partition environments, the system may halt completely.